FPGA-basеd hardware core for robust algorithms for assessing the state vector and control of dynamic systems

Authors

  • В. Н. Опанасенко
  • С. Б. Завьялов
  • О. Т. Софіюк

DOI:

https://doi.org/10.18372/2073-4751.64.15149

Keywords:

control of dynamic systems, estimation, FPGA, on–board processor, small spacecraft

Abstract

The hardware FPGA-based implementation of the Core for robust algorithms for estimating the state vector and controlling dynamic systems is considered. Comparison and analysis of the results of calculating the new center of the ellipsoid obtained for the model C - program, as well as the developed hardware kernel for evaluating the ellipsoidal state and control algorithms are carried out. The development was carried out using the WebPack ISE design system. Testing of the developed core is performed by comparing and analyzing the results obtained after testing the software C-model and testing the developed core by means of the ModelSim modeling system. The software model uses floating point formats - Single (32 bit), Double (64 bit). Since a significant influence on the accumulation of errors was found as a result of calculating and interpreting input data in the Single (32 bit) format, the hardware core is implemented in 2 versions: with support for 32 bit arithmetic and 64 bit arithmetic.

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