The influence of virtual channals on transport delay in networks on CHPI

Authors

  • Е. В. Короткий Национальный технический университет Украины “КПИ”
  • А. Н. Лысенко Национальный технический университет Украины “КПИ”

DOI:

https://doi.org/10.18372/2073-4751.2.9204

Abstract

In this work the behavioral model of virtual channel (VC) integrated router is proposed. On the basis of it the behavioral model of network on chip (NoC) with 4x4 mesh topology is created. For this NoC we’ve studied the dependence of average transport delay on intensity of applied load and number of VC’s per routers port. It is shown that conducting investigations in direction of uneven distribution of virtual channel count for different ports of integrated router seems a topical area of research

References

Angiolini F., Meloni Р., Benini L. А layout-aware analysis of networks-on-chip and traditional interconnects for mpsocs // IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems. -

- Vol.26, №3. - P. 421-434.

Lee H.G., Ogras U.Y., Marculescu R. On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus and network-on-chip approaches // ACM Transactions on Design Automation of Electronic Systems- 2007- Vol.12, №3. - P. 1-20.

Dally W., Towles B. Route packets, not wires: on-chip interconnection networks // Proceedings of the 38th annual Design Automation Conference (June 2001). - Las Vegas, USA. - P. 684-689.

Bjerregaard T., Mahadevan S. A survey of research and practices of network- on-chip // ACM Computing Surveys- 2006 - Vol.38, №1— P. 1-51.

Atienza D., Angiolini F., Benini L. Network-On-Chip Design and Synthesis Outlook // Integration The VLSI journal.- 2008, - Vol.41, №3,- P. 340-359.

Marculescu R., Bogdan P. The Chip Is the Network: Toward a Science of Network-on-Chip Design // Foundations and Trends in Electronic Design Automation. -

- Vol.2, №4. - P. 371-461.

Marculescu R., Ogras U. Outstanding Research Problems in NoC Design: System, Microarchitecture and Circuit Perspectives // IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems.- 2009,- Vol.28, №L- P. 3-21.

Dally W.J. Performance analysis of k-ary n-cube interconnection networks // IEEE Transactions on Computers- 1990.- Vol.39, №6,- P. 775-785.

. Karol M.J., Hluchyj M.G., Morgan S.P. Input Versus Output Queueing on a Space-Division Packet Switch // IEEE Transactions on Communications- 1987 — Vol.35, №12 - P. 1347-1356.

Dally W.J. Virtual-channel flow control // IEEE Transactions on Parallel and Distributed Systems.- 1992,- Vol.3, №2.- P.194-205. Dally W.J., Peh L.S. A Delay Model and Speculative Architecture for Pipelined Routers // in Proc. of 7-th International Symposium of High-Performance Comp. Arch. (20-24 Jan. 2001).- Nuevo Leone, Mexico-P. 255-266.

Issue

Section

Статті