Four-bit Nanoadder Controlled by Five-Inputs Majority Elements

Authors

  • Oleksandr Melnyk National Aviation University, Kyiv, Ukraine https://orcid.org/0000-0003-1072-5526
  • Maksym Kravets National Aviation University, Kyiv, Ukraine
  • Valerii Kravets National Aviation University, Kyiv, Ukraine

DOI:

https://doi.org/10.18372/1990-5548.74.17310

Keywords:

quantum-dot cellular automata, majority element, full adder, computer-aided design systems, high performance design

Abstract

This paper presents a nano circuit of a full one-bit adder on the proposed five-input majority element. This innovative full adder design is used to development of a four-bit adder based on it. We offer a new single-bit full adder and a four-bit adder nano circuit in quantum-dot cellular automata technology. The proposed design four-bit adder utilizes only 231 quantum cells in a 0.49 µm2 area. It has a reduction in the number of cells, delay and energy dissipation at 1 K compared to the existing works. The QCADdesigner version 2.0.3 tool implements the developed quantum-dot cellular automata full adder and four-bit adder circuits. The implementation results show that the developed quantum-dot cellular automata full adder and four-bit adder circuits have an improvement over other quantum-dot cellular automata full adder circuits.

Author Biographies

Oleksandr Melnyk, National Aviation University, Kyiv, Ukraine

Candidate of Sciences (Engineering)

Associated Professor

Department of Electronics, Robotics, Monitoring & IoT Technologies

Maksym Kravets , National Aviation University, Kyiv, Ukraine

Master's student

Department of Electronics, Robotics, Monitoring & IoT Technologies

Valerii Kravets, National Aviation University, Kyiv, Ukraine

Master's student

Department of Electronics, Robotics, Monitoring & IoT Technologies

References

P. Balasubramanian, “A latency optimized biased implementation style weak-indication self-timed full adder,” Facta Universitatis, Series: Electronics and Energetics, vol. 28, pp. 657–671, 2015. https://doi.org/10.2298/FUEE1504657B

A. Rezai, and P. Keshavarzi, “High-performance scalable architecture for modular multiplication using a new digit-serial computation,” Micro. J., vol. 55, pp. 169–178, 2016. https://doi.org/10.1016/j.mejo.2016.07.012

A. Rezai, and P. Keshavarzi, “High-throughput modular multiplication and exponentiation algorithm using multibit-scan-multibit-shift technique,” IEEE Trans. VLSI syst., vol. 23, pp. 1710–1719, 2015. https://doi.org/10.1109/TVLSI.2014.2355854

M. Balali, A. Rezai, H. Balali, F. Rabiei, and S. Emadi, “A novel design of 5-input majority gate in quantum-dot cellular utomata technology,” in Proceedings of the IEEE Symp. Comput. Appl. Indust. Electr. (ISCAIE 2017), 2017, pp. 13–16. https://doi.org/10.1109/ISCAIE.2017.8074941

H. Rashidi, A. Rezai, and S. Soltani, “High-performance multiplexer circuit for quantum-dot cellular automata,” J. Comput. Electr., vol. 15, pp. 968–98, 2016. https://doi.org/10.1007/s10825-016-0832-3

All-Ukrainian interdepartmental scientific and technical collection [Electronic resource]. – Resource access mode: https://www.ewdtest.com/asu/wp-content/uploads/2015/05/asu_166_2014_new1.pdf (date of application 05.01.2023 р). [in Ukrainian]

N. N. Pakulov, The majority principle of constructing reliable components and devices of a digital computer, Мoscow: Sov. radio, 1974. [in Russian]

I. Hänninen, and J. Takala, “Binary adders on quantum-dot cellular automata,” J. Sign. Process. Syst., vol. 58, pp. 87–103, 2010. https://doi.org/10.1007/s11265-008-0284-5

B. Ramesh, and M. A. Rani, “Design of binary to BCD code converter using area optimized quantum- dot cellular automata full Adder,” Int. J. Eng., vol. 9, pp. 49–64, 2015.

D. Abedi, G. Jaberipur, and M. Sangsefidi, “Coplanar full adder in quantum-dot cellular automata via clock-zone-based crossover,” IEEE Trans. Nanotech., vol. 14, pp. 497–504, 2015. https://doi.org/10.1109/TNANO.2015.2409117

S. Hashemi, and K. Navia, “A Novel Robust QCA Full-adder,” Proc. Mater. Sci., vol. 11, pp. 376–380, 2015. https://doi.org/10.1016/j.mspro.2015.11.133

M. Mohammadi, M. Mohammadi, and S. Gorgin, “An efficient design of full adder in quantum-dot cellular automata (QCA) technology,” Microelectr. J., vol. 50, pp. 35–43, 2016. https://doi.org/10.1016/j.mejo.2016.02.004

F. Ahmad, G. M. Bhat, H. Khademolhosseini, S. Azimi, S. Angizi, and K. Navi, “Towards single layer quantum-dot cellular automata adders based on

explicit interaction of cells,” J. Comput. Sci., vol. 16, pp. 8–15, 2016. https://doi.org/10.1016/j.jocs.2016.02.005

C. Labrado, and H. Thapliyal, “Design of adder and subtractor circuits in majority logic-based field- coupled QCA nano computing,” Electron. Lett., vol. 52, pp. 464–466, 2016. https://doi.org/10.1049/el.2015.3834

M. Balali, A. Rezai, H. Balali, F. Rabiei, and S. Emadid, “Towards coplanar quantum-dot cellular automata adders based on efficient three-input XOR gate,” Result. Phys., vol. 7, pp. 1389–1395, 2017. https://doi.org/10.1016/j.rinp.2017.04.005

Design of novel efficient full adder circuit for quantum-dot cellular automata technology [Electronic resource]. – Resource access mode: http://www.doiserbia.nb.rs/img/doi/0353-3670/2018/0353-36701802279M.pdf (date of application 05.01.2023 р).

V. Pudi, and K. Sridharan, “Low complexity design of ripple carry and Brent-Kung adders in QCA,” IEEE Trans. Nanotech., vol. 11, pp. 105–119, 2012. https://doi.org/10.1109/TNANO.2011.2158006

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Published

2022-12-29

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Section

AUTOMATION AND COMPUTER-INTEGRATED TECHNOLOGIES